Design of a Mask-Protected Scheme for AES

Side-channel attacks exploit leaked power consumption information to crack hardware encryption algorithms. In this paper, an AES encryption and decryption module with masking has been implemented using Verilog HDL. The most critical nonlinear S-box substitution adopts an implementation method based on finite fields. The analysis of results shows that, compared to algorithms without masking, this method can effectively counter side-channel attacks and enhance the security of hardware encryption implementations.