A 224Gb/s 3pJ/bit 42dB Insertion Loss Post-FEC Error Free Transceiver in 3-nm FinFET CMOS (Invited)
Long-reach capable, 224Gb/s, DSP based, electrical transceiver so-lutions have emerged over the last 2–3 years. The wide deployment of such transceivers into high-radix switches and artificial intelligence accelerator ASICs requires continuing innovation of the transceiver implementation. This article discusses the latest performance im-provements achieved by the proposed 3-nm CMOS transceiver solution. This includes improved pre-FEC bit-error rate, support of higher insertion loss channels and crosstalk robustness. Backward com-patibility with 100Gb/s class transceivers was added to ameliorate the acceptance of 224Gb/s links. The refined transceiver design achieves post-FEC, error-free, 42dB insertion loss operation with a large margin to uncorrectable pre-FEC errors.
Authors
- Noman Hai
- R. Mason (ORCID: https://orcid.org/0000-0002-1260-6451)
- Mostafa A. N. Haroun
- Marc-Andre LaCroix (ORCID: https://orcid.org/0000-0002-6868-6294)
- Mohammad-Mahdi Mohsenpour (ORCID: https://orcid.org/0000-0001-9324-0852)
- Muhammad Nummer
- C. Nunes de Carvalho (ORCID: https://orcid.org/0000-0003-2563-7238)
- Tom Eeckelaert
- Carson Dick
- Dirk Pfaff (ORCID: https://orcid.org/0000-0002-9658-5765)
- Ifrah Jaffri (ORCID: https://orcid.org/0000-0002-3483-4957)
- Tahseen Shakir
- Howard Huang (ORCID: https://orcid.org/0000-0002-4510-0246)
- Haitao Mei
- Alif Zaman
- Kai Yang (ORCID: https://orcid.org/0000-0002-1982-4398)
- D.A. Yokoyama-Martin
- Babak Zamanlooy (ORCID: https://orcid.org/0000-0001-9608-5229)
- Fahmida Pervin Brishty
- Dmitry Petrov (ORCID: https://orcid.org/0000-0003-0445-3923)
- Jingjing Xia (ORCID: https://orcid.org/0000-0003-4391-4817)
- C. Leong (ORCID: https://orcid.org/0000-0001-6132-3741)
Publication Details
- Published
- 2025-04-13
- DOI
- https://doi.org/10.1109/cicc63670.2025.10983461
- Citations
- 1
- Primary Topic
- Photonic and Optical Devices
- Type
- article
- Field-Weighted Citation Impact
- 0.73