Study of Chip Integration Process and Cooling Enhancement Based on BN-Filled Through-Silicon Vias
This work reports a method to fill silicon via holes with ultra-high thermal conductivity Boron Nitride (BN) nanosheet materials (particle size <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\leqslant\ 10\ \mu\mathrm{m})$</tex>. The thermal conductivity of the filled silicon vias is <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$146.177\ \mathrm{W}/(\mathrm{m}\cdot \mathrm{K})$</tex>, which is about 57.29% higher than that of the unfilled silicon vias. Utilizing the ultra-high thermal conductivity of BN and the thermal expansion coefficient that matches with that of Si, the thermal conductivity of the silicon vias can be effectively improved, which provides a new idea and methodology in the field of thermal management of three-dimensional integrated circuits.
Authors
- Ningqiang Shi
- Shenggen Fan (ORCID: https://orcid.org/0000-0002-2658-4863)
- Ling Li (ORCID: https://orcid.org/0000-0003-0259-954X)
- Jinchang Meng
- Siqi Zhao (ORCID: https://orcid.org/0000-0002-9327-5921)
Institutions
- Harbin Institute of Technology (CN)
Publication Details
- Published
- 2024-11-21
- DOI
- https://doi.org/10.1109/aisomt64170.2024.10992059
- Primary Topic
- 3D IC and TSV technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Natural Science Foundation of China
- Natural Science Foundation of Heilongjiang Province