A Non-Nearest Space Vector Modulation With Reduced Common-Mode Voltage for Three-Level ANPC Inverter-Fed PMSM Drives

Due to the advantages of low harmonic distortion, low voltage stress and high efficiency, three-level inverters have been widely employed in various applications. Conventional three-level PWM methods typically adjust the duty ratio of redundant small vectors to achieve NP voltage control. Conversely, CMV reduction methods avoid using redundant small vectors that generate high common mode voltage. To address this issue, this paper proposes a novel modulation technique for three-level inverters. This approach is developed based on the non-nearest space vector synthesis criterion, reducing the CMV amplitude to 50% compared to conventional SVPWM. Furthermore, a new NP voltage balance method is proposed, which utilizes small and medium vectors with opposite neutral-point currents to adjust the neutral-point voltage. The performance of this modulation approach is validated by comparative simulations and experimental tests, with the results presenting lower total harmonic distortion, improved NP voltage regulation capability, and enhanced inverter efficiency.