ARV-Q: An Adaptive RISC-V Vector Processor for Unified Support of Post-Quantum Standards and Side-Channel Protection on the Edge

Under the threat of quantum computers, the public-key cryptosystems need to transition to the Post-Quantum Cryptography (PQC) standards. However, this migration process is hindered by the diverse mathematical structures of PQC standards as well as the side-channel attacks, especially for the resource-constrained and physically accessible edge devices. To address this issue, we present ARV-Q, an adaptive RISC-V vector processor that efficiently offers unified support of PQC standards and side-channel security enhancement. Firstly, we propose an adaptive RISC-V-based computing paradigm to adapt to PQC algorithms across diverse mathematical bases, the core of which is a crypto extension supporting all PQC standards plus schemes in the fourth round in NIST standardization process. This crypto extension can well cooperate with the RISC-V Vector Extension (RVV) and is capable of adaptive operator-type support. Second, we design a highly resource-efficient vector crypto engine featuring versatile Butterfly Units and multi-Selected-Element-Width-adaptive modular arithmetic constructs, achieving high hardware utilization with configurable parameter settings. The crypto engine is integrated into the RISC-V core via an agile extension interface capable of bridging all types of register transfers. Besides, due to the capability of cooperative hybrid vector computing of RVV and crypto extension, ARV-Q can flexibly adapt to side-channel attacks with no hardware overhead while maintaining high performance. ARV-Q is implemented in 22nm process, and post-layout simulations are conducted. Results outperform the state-of-the-art counterparts in primary PQC standards with 1.21-5.14× better latency and more than 4.41× better area efficiency.