A Peak-Injection CLS Technique for PVT-Robust Switched-Capacitor Amplifier

This brief proposes a peak-injection correlated-level shifting (PICLS) technique to enhance the equivalent gain of an amplifier against process, voltage, and temperature (PVT) variations, thereby improving robustness. Furthermore, PICLS outperforms other CLS techniques in both energy efficiency and circuit complexity by eliminating the need for complex optimum-gain-detection or loop-cutoff circuits. To validate the technique, a PICLS-based inverter-switched-capacitor (SC) amplifier was implemented in 180-nm CMOS. Compared to the conventional CLS, PICLS achieves at least 23% higher equivalent gain across PVT conditions, with a total harmonic distortion (THD) of 0.002339% at 1.390625 kHz. The spurious-free dynamic range (SFDR) reaches 95.1 dB, a 17 dB improvement over the conventional CLS. When applied to an integrator, PICLS reduces output error by 69.2% after 15 integrations. The layout area is 0.052216 mmtextsuperscript2.

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Publication Details

Journal
IEEE Transactions on Circuits & Systems II Express Briefs
Published
2025-05-19
DOI
https://doi.org/10.1109/tcsii.2025.3571542
Citations
8
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
Field-Weighted Citation Impact
5.39

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article

A Peak-Injection CLS Technique for PVT-Robust Switched-Capacitor Amplifier

Yuhua Liang, Ruiwen Liu, Ruixue Ding, Zhangming Zhu et al.
8 citations
IEEE Transactions on Circuits & Systems II Express Briefs
Analog and Mixed-Signal Circuit Design
5.39
article

A Peak-Injection CLS Technique for PVT-Robust Switched-Capacitor Amplifier

Yuhua Liang, Ruiwen Liu, Ruixue Ding, Zhangming Zhu, Pan Rui
article en
8 citations

Abstract

This brief proposes a peak-injection correlated-level shifting (PICLS) technique to enhance the equivalent gain of an amplifier against process, voltage, and temperature (PVT) variations, thereby improving robustness. Furthermore, PICLS outperforms other CLS techniques in both energy efficiency and circuit complexity by eliminating the need for complex optimum-gain-detection or loop-cutoff circuits. To validate the technique, a PICLS-based inverter-switched-capacitor (SC) amplifier was implemented in 180-nm CMOS. Compared to the conventional CLS, PICLS achieves at least 23% higher equivalent gain across PVT conditions, with a total harmonic distortion (THD) of 0.002339% at 1.390625 kHz. The spurious-free dynamic range (SFDR) reaches 95.1 dB, a 17 dB improvement over the conventional CLS. When applied to an integrator, PICLS reduces output error by 69.2% after 15 integrations. The layout area is 0.052216 mmtextsuperscript2.

IEEE Transactions on Circuits & Systems II Express BriefsVol. 72(7)
Xidian University (CN)
National Natural Science Foundation of China
Affordable and clean energy
Openalex Percentile: Top 4%
Analog and Mixed-Signal Circuit Design
5.39
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