Weak Snapback Silicon Controlled Rectifier ESD Device With Double Snapback Characteristics

This paper investigates three Silicon Controlled Rectifier (SCR) devices employing different shunting methods to enhance the holding voltage and prevent latch-up. The operating principles of these devices are analyzed using equivalent circuits and two-dimensional (2D) device simulations, while the device performance is validated through Transmission Line Pulse (TLP) testing and curve tracer characterization. The Weak Snapback SCR (WSSCR), utilizing the third shunting method, achieves the highest holding voltage (Vh) of 7.12 V while maintaining a trigger voltage as low as 8.92 V, fully meeting the 5V ESD design requirements. Meanwhile, during high-temperature and long-pulse-width TLP testing, its V. remains above 5.5V, meeting the latch-up immunity requirement. The WSSCR exhibits unique double-snapback characteristics. Such feature is explained by analyzing transient waveforms at various points during the TLP test and Technology Computer Aided Design (TCAD) simulations.