Rapid Modeling Method of Partial Power Processing Architecture With Circuit‐Analysis‐Free Based on State‐Space Averaging

ABSTRACT DC‐DC converters based on partial power processing (PPP) offer the advantage of high power density and high efficiency and are considered an attractive solution in various systems like photovoltaic systems, energy storage systems. It has been demonstrated that PPP topologies can be synthesized starting from buck‐boost converter in a limited number of steps. Based on these steps, this paper proposes a new rapid modeling method for PPP topologies. It has been demonstrated that the voltage gains of all synthesized topologies can be obtained from the voltage gain of buck‐boost converter and the corresponding voltage gain formulas. Similarly, the models of all synthesized topologies can be obtained from the model of buck‐boost converter and the corresponding modeling formulas. This method requires no manual circuit analysis, only a computer to execute the program. It is rapid and significantly simplifies the modeling process. The proposed modeling method is validated through the models of several classic topologies and frequency sweeping in the simulation.