Design and Implementation of AES Encryption and Decryption for 45nm Technology

The Advanced Encryption Standard (AES) is a widely used symmetric block cipher ensuring data confidentiality. It operates on 128- bit blocks and supports key sizes of 128, 192, and 256 bits. Each key length defines the number of rounds, balancing security and computational load. AES uses key expansion, S-box substitution, permutation, and Galois field arithmetic. These features make AES resistant to brute-force and cryptanalysis attacks. It is efficient in both hardware and software, from embedded systems to large networks. AES outperforms older standards like DES and 3DES in key size and internal complexity. Its structure supports parallel processing, ideal for VLSI and modern computing. No practical attack has successfully broken AES when implemented properly. It’s used in banking, military, and secure communication protocols. This work explores AES’s encryption, decryption, key generation, and architecture. It also compares AES to DES, 3DES, and Blowfish in speed, security, and performance.