Latch-Up Over-Current Protection Design with Power Restarted Function

Latch-up is a reliability issue in CMOS integrated circuits caused by the parasitic silicon-controlled rectifier (SCR) structure. When it was triggered on, it creates a low-impedance path between the power (VDD) and ground (Vss) to burn out the silicon chip. In this work, an over-current protection design is proposed to detect latch-up occurrence, deactivate it by turning off the power, and reinitialize the circuit after a programmable delay. This design aims to mitigate latch-up hardware failure and restore the normal circuit operation through timely power cycling. The programmable delay, auto-restart function, and independent control circuit are designed to enhance both latch-up immunity and application flexibility. Additionally, the latch-up over-current protection circuit is also designed to resist false triggering caused by inrush current. Through experimental results, the over-current protection circuit can promptly shut down the power supply upon detecting an over-current event, effectively preventing irreversible damage to the chip from latch-up incidents.