Design-Technology-Reliability Co-Optimization for MRAM-OTP Integration — A Methodological Approach

Magnetic Random Access Memory (MRAM) is one of the most promising candidates to replace eFlash as the embedded non-volatile memory in microcontroller units at advanced CMOS nodes for automotive application. In addition to serving as random-access memory for code and data storage, it can be adapted to function as one-time programmable memory (OTP), irreversible and resistant to magnetic interference, making it ideal for storing critical data such as encryption keys or security codes. Integrating OTP into an MRAM main array demands rigorous consideration to ensure macro reliability. This paper provides a model to assess design-technology-reliability co-optimization margin at early development stage. The model includes factors of OTP array size, magnetic tunnel junction (MTJ) film property and dimension, operation temperature, as well as process variation.