Power and SER Performance of Flip-Flop Cells with Low-Leakage Options
Low-leakage (LL) threshold voltage (VT) options are used at advanced technology nodes to reduce power consumption for mobile, Internet of Things (IoT), and space applications. A new measure, given by (SER<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">A*</sup>Ileakage<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">B</sup>) is proposed to measure the efficacy of different VT options. This Figure of Merit (FoM) varies widely for different LL and VT options available at a 3nm bulk FinFET node.
Authors
- Nicholas J. Pieper (ORCID: https://orcid.org/0000-0003-4968-7029)
- Dennis R. Ball (ORCID: https://orcid.org/0000-0003-0411-1835)
- Yoni Xiong (ORCID: https://orcid.org/0000-0002-3635-7429)
- Rita Fung (ORCID: https://orcid.org/0000-0001-9774-1451)
- B. L. Bhuva (ORCID: https://orcid.org/0000-0002-2171-100X)
- Jenna B. Kronenberg (ORCID: https://orcid.org/0009-0009-4632-6704)
Institutions
- Cisco Systems (United States) (US)
- Vanderbilt University (US)
Publication Details
- Published
- 2025-03-30
- DOI
- https://doi.org/10.1109/irps48204.2025.10982854
- Primary Topic
- Advancements in Semiconductor Devices and Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00