A Physics-Based Electromigration Assessment of Analog Circuits

A novel physics-based methodology of electromigration (EM) assessment, previously validated on dedicated test grids [1], [2], has been employed for analyzing EM reliability of a VDD net in an analog circuit for automotive applications. For interconnect structures, the methodology calculates EM-induced stress evolution, void-formation and redistribution of current along the interconnect including available redundant paths. The steady-state stress analysis shows that the net is immune to EM failure when source currents generated by devices are more than 2 times the source currents obtained from the traditional EM design rules. The obtained immunity condition is independent of temperature. EM lifetime analysis by employing voiding kinetics reveals that there is room for further increase of the source currents.