Overview of Reliability in Scaling Embedded STT-MRAM
Recently, major semiconductor manufacturers have developed spin-transfer torque magnetic random-access memory (STT-MRAM) embedded in logic node due to its superior properties. In order to leverage high performance in advanced logic node, it continues to scale down logic node from 28nm to 14nm and 8nm. As device dimensions shrink, variability in magnetic and electrical properties increases, impacting data retention, endurance, and read/write performance. In this paper, we review the overall reliability trends, highlighting specific reliability factors that demonstrate significant scaling dependence.
Authors
- Su‐Jin Ahn (ORCID: https://orcid.org/0000-0003-2128-1561)
- Jeong-Heon Park
- Yoon J. Song
- Hyunsung Jung
- Seungpil Ko
Institutions
- Samsung (South Korea) (KR)
Publication Details
- Published
- 2025-03-30
- DOI
- https://doi.org/10.1109/irps48204.2025.10983522
- Citations
- 2
- Primary Topic
- Advanced Surface Polishing Techniques
- Type
- article
- Field-Weighted Citation Impact
- 1.35