Enhancing Reliability of Power IC and Power Devices for AI Hardware: Addressing Gate Oxide Defects, Transient Voltage Overshoot, and BVDss Instability

The increasing power demands of AI Artificial intelligence (AI) hardware and high-performance computing (HPC) applications are pushing the limits of power IC and power device reliability. Conventional qualification methods are proving insufficient in addressing these challenges. This paper focus on three critical reliability concerns: gate oxide defects in power ICs, presenting a new screening method using the bootstrap pin for efficient detection of gate oxide defects; transient voltage overshoot in Smart Power Stages (SPSs), introducing a new step-wise current stress test; and BVDss instability in shielded gate trench MOSFETs, investigating the root cause and demonstrating a design optimization solution. By addressing these challenges, this work aims to enhance the reliability of power IC and power devices, enabling the development of more robust and efficient AI and HPC processors.

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Publication Details

Published
2025-03-30
DOI
https://doi.org/10.1109/irps48204.2025.10983091
Primary Topic
Silicon Carbide Semiconductor Technologies
Type
article
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article

Enhancing Reliability of Power IC and Power Devices for AI Hardware: Addressing Gate Oxide Defects, Transient Voltage Overshoot, and BVDss Instability

Haitham Hamed, Jifa Hao
Silicon Carbide Semiconductor Technologies
article

Enhancing Reliability of Power IC and Power Devices for AI Hardware: Addressing Gate Oxide Defects, Transient Voltage Overshoot, and BVDss Instability

Haitham Hamed, Jifa Hao
article en

Abstract

The increasing power demands of AI Artificial intelligence (AI) hardware and high-performance computing (HPC) applications are pushing the limits of power IC and power device reliability. Conventional qualification methods are proving insufficient in addressing these challenges. This paper focus on three critical reliability concerns: gate oxide defects in power ICs, presenting a new screening method using the bootstrap pin for efficient detection of gate oxide defects; transient voltage overshoot in Smart Power Stages (SPSs), introducing a new step-wise current stress test; and BVDss instability in shielded gate trench MOSFETs, investigating the root cause and demonstrating a design optimization solution. By addressing these challenges, this work aims to enhance the reliability of power IC and power devices, enabling the development of more robust and efficient AI and HPC processors.

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