Fault Isolation and Failure Analysis Challenges in Advanced Packages (Invited)

This paper provides a comprehensive review of the challenges associated with fault isolation (FI) and failure analysis (FA) techniques for advanced packaging technologies, including 2.5D and 3D packages. A generic FI-FA flow is proposed with detailed illustration of FI-FA techniques used in die-level and package-level fault isolation, high resolution imaging, die removal, delayering, cross-section, micro probing, electron microscopy, and material analysis. Additionally, current capabilities and future development trends in Artificial Intelligence (AI) assisted FI and FA methodologies are also highlighted.

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Publication Details

Published
2025-03-30
DOI
https://doi.org/10.1109/irps48204.2025.10982912
Citations
1
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
Type
article
Field-Weighted Citation Impact
0.73
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article

Fault Isolation and Failure Analysis Challenges in Advanced Packages (Invited)

Yan Li
1 citations
Integrated Circuits and Semiconductor Failure Analysis
0.73
article

Fault Isolation and Failure Analysis Challenges in Advanced Packages (Invited)

Yan Li
article en
1 citations

Abstract

This paper provides a comprehensive review of the challenges associated with fault isolation (FI) and failure analysis (FA) techniques for advanced packaging technologies, including 2.5D and 3D packages. A generic FI-FA flow is proposed with detailed illustration of FI-FA techniques used in die-level and package-level fault isolation, high resolution imaging, die removal, delayering, cross-section, micro probing, electron microscopy, and material analysis. Additionally, current capabilities and future development trends in Artificial Intelligence (AI) assisted FI and FA methodologies are also highlighted.

Samsung (United States) (US)
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Integrated Circuits and Semiconductor Failure Analysis
0.73
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