Temperature and Drift-Aware High-Level PCM-based Array Model for Reliable Hardware IMC Design

In-Memory Computing (IMC) is a promising approach aimed at overcoming the memory wall dilemma. Emerging non-volatile memories, such as Phase-Change Memory (PCM) are fundamental for low-power IMC on the edge. However, PCM device non-idealities, hardware challenges, and application-dependent requirements render the design of IMC particularly complex. In this work, we tackle this challenge by proposing a novel high-level PCM-based model for hardware IMC. For the first time, we consider the temperature effect on PCM conductance stability–a key parameter for reliable PCM-based IMC hardware.