Machine Learning-Assisted Modeling of AC Stress-Induced Bias Temperature Instability in Oxide Channel Transistors for 2T Gain Cell eDRAM

Physics-based compact modeling requires substantial work to formulate equations and fine-tune coefficients. In this work, we propose a machine learning (ML)-assisted compact model to capture alternating current (AC)-induced positive bias temperature instability (PBTI) in top-gate indium tungsten oxide (IWO) transistors, demonstrating high accuracy (R2 = 0.94, _ 0.98) across various operating conditions. Aging simulations of 2T gain cell (GC) embedded DRAM (eDRAM) reveal that the write transistor is more vulnerable to AC stress, leading to data hold failures as the number of AC cycles increases. This study highlights the advantages of ML-assisted compact modeling in improving reliability predictions for emerging semiconductor devices.

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Published
2025-03-30
DOI
https://doi.org/10.1109/irps48204.2025.10982936
Citations
1
Primary Topic
Semiconductor materials and devices
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article
Field-Weighted Citation Impact
0.73
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article

Machine Learning-Assisted Modeling of AC Stress-Induced Bias Temperature Instability in Oxide Channel Transistors for 2T Gain Cell eDRAM

Omkar Phadke, Sharadindu Gopal Kirtania, Jungyoun Kwak, Suman Datta et al.
1 citations
Semiconductor materials and devices
0.73
article

Machine Learning-Assisted Modeling of AC Stress-Induced Bias Temperature Instability in Oxide Channel Transistors for 2T Gain Cell eDRAM

Omkar Phadke, Sharadindu Gopal Kirtania, Jungyoun Kwak, Suman Datta, Junmo Lee, Shimeng Yu, G.T. Jeong, Chengyang Zhang
article en
1 citations

Abstract

Physics-based compact modeling requires substantial work to formulate equations and fine-tune coefficients. In this work, we propose a machine learning (ML)-assisted compact model to capture alternating current (AC)-induced positive bias temperature instability (PBTI) in top-gate indium tungsten oxide (IWO) transistors, demonstrating high accuracy (R2 = 0.94, _ 0.98) across various operating conditions. Aging simulations of 2T gain cell (GC) embedded DRAM (eDRAM) reveal that the write transistor is more vulnerable to AC stress, leading to data hold failures as the number of AC cycles increases. This study highlights the advantages of ML-assisted compact modeling in improving reliability predictions for emerging semiconductor devices.

Georgia Institute of Technology (US)
Affordable and clean energy, Climate action
Openalex Percentile: Top 28%
Semiconductor materials and devices
0.73
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Machine Learning-Assisted Modeling of AC Stress-Induced Bias Temperature Instability in Oxide Channel Transistors for 2T Gain Cell eDRAM — Omkar Phadke, Sharadindu Gopal Kirtania, et al. · (2025) | TGRS Research Map | TGRS