Machine Learning Powered Single Event Latch-up (SEL) Failure Rate Prediction Methodology in Advanced Bulk FinFET Technology

A breakthrough in chip-level single event latch-up (SEL) methodology is achieved by machine learning (ML) techniques to precisely predict the SEL failure rates covering both CMOS logic design and process variations in advanced bulk FinFET technology. With sufficiently large data collection from the accelerated SEL experiment and a physics-informed approach to train the artificial feedforward neural network model, high accuracy and physical interpretability are successfully consolidated in comparison to the experimental results. Through such ML-powered prediction methodology, chip-level SEL local hardening and design-technology co-optimization (DTCO) can be realized based on the comprehensive SEL performance evaluation.