Towards a Computationally Efficient Verilog-A Defect-Centric BTI Compact Model for Circuit Aging Simulations
Complex physics-based models have been developed with the capability to capture typical BTI features like recovery, time-dependent variability and long-term saturation. However, for a successful EDA compact model, other practical criteria like stability (convergence) and computational efficiency are just as important as those functional features. In this paper, we perform a study a previously published Verilog-A based BTI model from the perspective of practical feasibility. To that end, (i) we analyze the computational performance of the BTI model, and (ii) we achieve an optimal trade-off between accuracy and computational efficiency with a newly proposed methodology for reducing the number of traps.
Authors
- D. Claes (ORCID: https://orcid.org/0000-0002-0356-0973)
- Georges Gielen (ORCID: https://orcid.org/0000-0002-4061-9428)
- D. Sangani (ORCID: https://orcid.org/0000-0002-1016-8654)
- B. Kaczer (ORCID: https://orcid.org/0000-0002-1484-4007)
- Pieter Weckx (ORCID: https://orcid.org/0000-0003-4579-0571)
Institutions
- IMEC (BE)
Publication Details
- Published
- 2025-03-30
- DOI
- https://doi.org/10.1109/irps48204.2025.10983507
- Citations
- 1
- Primary Topic
- Semiconductor materials and devices
- Type
- article
- Field-Weighted Citation Impact
- 0.73