Design of a Low-Latency d<i>v</i>/d<i>t</i> and d<i>i</i>/d<i>t</i> Closed-Loop Active Gate Driver for SiC MOSFETs With Simple Structure
This study addresses the issue of voltage and current overshoot in SiC MOSFET applications by proposing a novel Kelvin-source series active gate driver (AGD). The proposed AGD combines the benefits of existing structures while utilizing a closed-loop dv/dt and di/dt mixed control method, ensuring adaptability of varying load conditions. The implementation circuit consists mainly of simple BJT followers and resistor-capacitor passive networks. The circuit features real-time feedback control, straightforward design, and rapid response time. Through simulation and experiment, the proposed AGD demonstrated effective suppression of overshoot and lower switching loss compared to conventional gate driver, while enhancing EMI performance during hard-switching. The proposed AGD shows simplicity and versatility, proving its potential in SiC MOSFET applications.
Authors
- Yubo Yuan
- Wu Chen (ORCID: https://orcid.org/0000-0002-1835-7564)
- Xuhao Zhu
Institutions
- Southeast University (CN)
Publication Details
- Journal
- IEEE Open Journal of Power Electronics
- Published
- 2025-01-01
- DOI
- https://doi.org/10.1109/ojpel.2025.3569561
- Primary Topic
- Silicon Carbide Semiconductor Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00