A Low Power BiCMOS UWB LNA with Reduced Chip Area for Sustainable IoT Electronics

A low power, inductor-free, two-stage UWB LNA was designed and fabricated in 130nm SiGe BiCMOS technology. The proposed cascadation of a common-base and a common-collector stage with negative feedback enables high gain, wideband active matching and adequate linearity, consuming only 2.9mW. The measured gain S<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">21</inf> is higher than 10.8dB while the noise figure NF stays below 5.3dB over the entire frequency range. Including AC coupling capacitors, the total chip area is less than 0.021mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. Considering the low power and chip area requirements, the presented LNA provides superior performance to enable the next generation of sustainable RF circuits for IoT applications.