High Accuracy Timing Clock Synchronization on RFSoC Board
In this paper, we present an implementation of clock synchronization on a Field Programmable Gate Array (FPGA) platform, with a focus on achieving ultra-low jitter of the order of 50 picoseconds over fiber optic channel extending up to 80 km without amplification. We also demonstrate 256 Mbps data transmission using Quadrature Phase Shift Keying (QPSK) modulation and demodulation, where the data generated on one FPGA board are acquired on another FPGA board with the synchronized clock.
Authors
- Anil Prabhakar (ORCID: https://orcid.org/0000-0003-0808-3157)
- Saravana Vilashini M
- Vaibhav Pratap Singh (ORCID: https://orcid.org/0009-0005-5219-5852)
Institutions
- Indian Institute of Technology Madras (IN)
Publication Details
- Published
- 2025-03-06
- DOI
- https://doi.org/10.1109/ncc63735.2025.10983473
- Primary Topic
- Advancements in PLL and VCO Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00