QC-LDPC Standards for Optimized 5G Architecture
In the future phase of inventive television, quasi-cyclic minimum parity-check circuits are the suggested option for data streams. Signal words from the QC-LDPC encoding are promptly received by the rate matcher at the transmitter end. The rate matcher's duty is to choose the appropriate number of code bits by repetition and/or puncturing. Code segments that are not selected need not be encoded. The de-rate matcher at the receiver side combines code bits from many broadcast attempts before sending the code bits to the QC-LDPC decoder. Only the necessary systematic bits must be included in the output of the QC-LDPC decoder. Parity bits and unnecessary systematic bits may be completely removed from the decoding process. Instead of using a full-base matrix throughout the protection and decoding process, these variables permit the use of a lower sub-base matrix. In this study, we provide an effective implementation of 5G NR QC-LDPC codes. The full-base matrix is reduced before usage. Compared to earlier systems, the proposed method improves the 5G NR QC-LDPC upload performance..
Authors
- Manish Gupta (ORCID: https://orcid.org/0000-0001-9671-1605)
- V. Dinesh Babu (ORCID: https://orcid.org/0000-0002-4628-3531)
- L. S. Suvonova
- Pravesh Dhiman (ORCID: https://orcid.org/0000-0002-2490-6240)
- Zaid Alsalami
- Rajesh Kumar Singh (ORCID: https://orcid.org/0000-0003-4309-4943)
Institutions
- Iraqi University (IQ)
- Tashkent Institute of Irrigation and Agricultural Mechanization Engineers (UZ)
- Karpagam Academy of Higher Education (IN)
- GLA University (IN)
- Punjab Engineering College (IN)
Publication Details
- Published
- 2024-09-20
- DOI
- https://doi.org/10.1109/i3ceet61722.2024.10994168
- Primary Topic
- Error Correcting Code Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00