Varactors for Integrated RF Circuits in a 130 nm BiCMOS Technology
This paper addresses the optimization of accumulation-mode MOS-type (A-MOS) varactors in a 130 nm BiCMOS technology for applications in voltage-controlled oscillators (VCOs). By optimizing the varactor well doping profile, the tuning gain of the varactor decreased from ~ 3 fF/V•μm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> to less than 2 fF/V•μm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>, while the linear voltage range of the C-V curve increased from 0.8 V to 1.8 V maintaining an overall tuning range larger than 3. The impact of the varactor optimization on VCO performance was studied through circuit simulations, demonstrating a reduction of the phase noise at 32.8 GHz carrier frequency and 1 MHz offset by 4 dB/Hz.
Authors
- H. Rücker (ORCID: https://orcid.org/0000-0001-7407-959X)
- Corrado Carta (ORCID: https://orcid.org/0000-0001-9147-0160)
- M. Elviretti
- Nicola Pelagalli (ORCID: https://orcid.org/0000-0002-3435-4240)
- Andrea Malignaggi (ORCID: https://orcid.org/0000-0003-2497-5083)
- Christian Wipf (ORCID: https://orcid.org/0009-0005-3716-584X)
- Luis Salamanca
- Andreas Mai (ORCID: https://orcid.org/0000-0002-3861-0512)
Publication Details
- Published
- 2025-03-17
- DOI
- https://doi.org/10.23919/gemic64734.2025.10979116
- Primary Topic
- Advancements in Semiconductor Devices and Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00