Varactors for Integrated RF Circuits in a 130 nm BiCMOS Technology

This paper addresses the optimization of accumulation-mode MOS-type (A-MOS) varactors in a 130 nm BiCMOS technology for applications in voltage-controlled oscillators (VCOs). By optimizing the varactor well doping profile, the tuning gain of the varactor decreased from ~ 3 fF/V•μm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> to less than 2 fF/V•μm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>, while the linear voltage range of the C-V curve increased from 0.8 V to 1.8 V maintaining an overall tuning range larger than 3. The impact of the varactor optimization on VCO performance was studied through circuit simulations, demonstrating a reduction of the phase noise at 32.8 GHz carrier frequency and 1 MHz offset by 4 dB/Hz.

Authors

Publication Details

Published
2025-03-17
DOI
https://doi.org/10.23919/gemic64734.2025.10979116
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

Varactors for Integrated RF Circuits in a 130 nm BiCMOS Technology

H. Rücker, Corrado Carta, M. Elviretti, Nicola Pelagalli et al.
Advancements in Semiconductor Devices and Circuit Design
article

Varactors for Integrated RF Circuits in a 130 nm BiCMOS Technology

H. Rücker, Corrado Carta, M. Elviretti, Nicola Pelagalli, Andrea Malignaggi, Christian Wipf, Luis Salamanca, Andreas Mai
article en

Abstract

This paper addresses the optimization of accumulation-mode MOS-type (A-MOS) varactors in a 130 nm BiCMOS technology for applications in voltage-controlled oscillators (VCOs). By optimizing the varactor well doping profile, the tuning gain of the varactor decreased from ~ 3 fF/V•μm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> to less than 2 fF/V•μm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>, while the linear voltage range of the C-V curve increased from 0.8 V to 1.8 V maintaining an overall tuning range larger than 3. The impact of the varactor optimization on VCO performance was studied through circuit simulations, demonstrating a reduction of the phase noise at 32.8 GHz carrier frequency and 1 MHz offset by 4 dB/Hz.

Affordable and clean energy
Openalex Percentile: Top 92%
Advancements in Semiconductor Devices and Circuit Design
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.