Low-Power 4 GHz Frequency Synthesizer for WAIC Systems in 22nm fully-depleted SOI
A 4 GHz frequency synthesizer based on a fractional-N phase-locked loop (PLL) with a MASH 1-1-1 SDM is presented. The design was implemented in GlobalFoundries’ 22nm FDX (22FDX) process, which is well suited to integrated RF designs in this frequency range, using an active area of ca. 0.25 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>. This frequency synthesizer is intended as a building block for a demonstrator of a wireless intra-aircraft communication (WAIC) system. This paper covers the design architecture as well as simulation and measurement results of the high-performance on-chip signal generator system.
Authors
- Dario Stajic
- Piyush Kumar (ORCID: https://orcid.org/0000-0001-5982-3384)
- David Borggreve (ORCID: https://orcid.org/0009-0000-4203-8531)
- Enno Böhme
- Marc Huppmann
- Linus Maurer (ORCID: https://orcid.org/0000-0002-0723-3558)
- Büsra Tas
Institutions
- Fraunhofer Research Institution for Microsystems and Solid State Technologies (DE)
Publication Details
- Published
- 2025-03-17
- DOI
- https://doi.org/10.23919/gemic64734.2025.10979186
- Primary Topic
- Advancements in PLL and VCO Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00