A Varactor-Based LC-Resonant 3.6GHz LNA for 5G Base Station Applications

This research paper introduces a high-gain differential CMOS Low Noise Amplifier (LNA) with a varactor-tuned LC-tank at the drain to reduce process-related variations in resonance frequencies with minimal impact on gain and IIP3. The LNA is designed and fabricated in a 65nm TSMC CMOS technology and employs a two-stage cascoded differential amplifier topology, with on-chip baluns at the input and output of the chip. Measurements on a chip-on-board bonded die displays a gain of 20.1dB, accompanied by a power consumption of 24.8mW from a 1V supply voltage. The noise figure of the LNA is 5.7dB and the IIP3 is -12dBm, showing reasonably good match with postlayout simulations.