Optimization of Delay in Active Interconnects using Schmitt Trigger as an Active Component

This paper presents an approach, to reduce interconnect delay which leads to achieve high performance circuit with better reliability. In order to propagation of signal with reduced delay, passive interconnects have been replaced with Schmitt trigger in the discussed approach. It has been observed that without inserting Schmitt trigger the RC network produces delay of 70ns when Schmitt trigger is inserted delay is reduced up to of 28 ns which is 40% of the delay of original RC network and delay is reduced by 60% of the original RC network. All the simulation has been done by using LT-Spice software at 180nm CMOS technology.