Design of Instrumentation Amplifier for Pacemaker Using 180nm CMOS Technology

A instrumentation amplifier (IA) has been designed for pacemakers, crucial for amplifying and filtering the heart's faint electrical signals (0.05 Hz to 50 Hz). Built using 180nm CMOS technology and simulated in Cadence Virtuoso, the IA boasts a gain of 167 dB, a 6.248 kHz gain-bandwidth, a 176° phase margin, and a 100 dB common-mode rejection ratio (CMRR). These performance metrics demonstrate that the designed IA meets the stringent requirements for implantable pacemaker, ensuring reliable and accurate signal processing for proper cardiac pacing.