Analyzing Scaling Effects and Reliability Concerns in a Pre-Amplifier-Based Dynamic-Latch Comparator for Future High-Speed ADCs

This paper presents the execution of a low power and high-speed differential comparator using 90 nm to 16 nm technology scaling and at different temperature ranges including the supply voltage scaling at 16 nm technology. The study aim is to analyze the performance characteristics of dynamic and conventional comparators in relation to their capacity to reduce in size while maintaining constant functionality and dependability under thermal limitations that are common in low-power circumstances. The performance of circuit was analyzed by VDD scaling from 1.2 V to 0.7 V and at <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\Delta \text{Vin}$</tex> from 0.7 to 0.1. The obtained delay at 16 nm technology for temperature scaling from <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$27^{\circ}\mathrm{C}$</tex> to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$107^{\circ}\mathrm{C}$</tex> by 24.49% and the power consumption at 16 n <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$T$</tex> (nano technology) is 1.60 μW at room temperature and 1.39 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mu w$</tex> at <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$107^{\circ}\mathrm{C}$</tex>. Another analysis at <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\Delta \text{Vin}=0.7\mathrm{V}$</tex> to 0.1V for the same temperature conditions is obtained for delay as well as power is 24.36% decrease in delay and 8.92% power utilization respectively. For 0.1V <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\Delta \text{Vin}$</tex> the delay / power obtained is 29.67% drop in delay and 8.89% more power absorption for the same temperature conditions. The applications of comparator are multipurpose parts used in monitoring, control, and signal processing etc.

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Publication Details

Published
2025-03-21
DOI
https://doi.org/10.1109/dicct64131.2025.10986569
Primary Topic
Analog and Mixed-Signal Circuit Design
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article
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article

Analyzing Scaling Effects and Reliability Concerns in a Pre-Amplifier-Based Dynamic-Latch Comparator for Future High-Speed ADCs

J. Ajayan, Kuja Uday Sri
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Analog and Mixed-Signal Circuit Design
article

Analyzing Scaling Effects and Reliability Concerns in a Pre-Amplifier-Based Dynamic-Latch Comparator for Future High-Speed ADCs

J. Ajayan, Kuja Uday Sri
article en

Abstract

This paper presents the execution of a low power and high-speed differential comparator using 90 nm to 16 nm technology scaling and at different temperature ranges including the supply voltage scaling at 16 nm technology. The study aim is to analyze the performance characteristics of dynamic and conventional comparators in relation to their capacity to reduce in size while maintaining constant functionality and dependability under thermal limitations that are common in low-power circumstances. The performance of circuit was analyzed by VDD scaling from 1.2 V to 0.7 V and at <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\Delta \text{Vin}$</tex> from 0.7 to 0.1. The obtained delay at 16 nm technology for temperature scaling from <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$27^{\circ}\mathrm{C}$</tex> to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$107^{\circ}\mathrm{C}$</tex> by 24.49% and the power consumption at 16 n <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$T$</tex> (nano technology) is 1.60 μW at room temperature and 1.39 <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mu w$</tex> at <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$107^{\circ}\mathrm{C}$</tex>. Another analysis at <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\Delta \text{Vin}=0.7\mathrm{V}$</tex> to 0.1V for the same temperature conditions is obtained for delay as well as power is 24.36% decrease in delay and 8.92% power utilization respectively. For 0.1V <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\Delta \text{Vin}$</tex> the delay / power obtained is 29.67% drop in delay and 8.89% more power absorption for the same temperature conditions. The applications of comparator are multipurpose parts used in monitoring, control, and signal processing etc.

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Analyzing Scaling Effects and Reliability Concerns in a Pre-Amplifier-Based Dynamic-Latch Comparator for Future High-Speed ADCs — J. Ajayan, Kuja Uday Sri · (2025) | TGRS Research Map | TGRS