An Efficient Technique to Implement the Multi-Valued Logic Gates using Nano-FETs

In this study, carbon nanotube field-effect transistors (CNTFETs) are presented as the basis for energy-efficient multiple-valued logic (MVL) circuits. Leveraging CNTFET unique properties such as electron and hole mobility, and adjustable threshold voltage via diameter control, these designs demonstrate enhanced driving capacity, noise marg ins and resilience when contrasted with earlier designs that relied on CNTFETs. The HSPICE simulations using a standard CNTFET model demonstrate that the proposed ternary and quaternary circuits significantly outperform state-of-the-art CNTFET MVL circuits. Specifically, the proposed ternary based NOT, NAND and NOR circuits show average power-delay product (PDP) reductions of 92.66%, 94.92% and 96.96%, respectively. Similarly, the quaternary NOT, NAND and NOR circuits achieve average PDP improvements of 69.43%, 52.99%, and 56.24%, respectively, compared to other existing quaternary CNTFET designs.