Root cause analysis to predict the die cracks in the multichip package

The development of densely packed multi-chip packages involves numerous processes, making them susceptible to mechanical and electrical failures, specifically with overhanging dies. The encapsulated package with visible surface defects is taken for the study to understand the root cause of the defects. Decapsulation of packages have visible die cracks and simulations are performed to understand the effect of the package development processes. One of probable failure mode of fluid structure interaction (FSI) during encapsulation is simulated and understood the effect of mold flow on the overhang. Another process of wire bonding is simulated to understand the effect of wire bonding process induces stresses on overhang die. It is observed that wire bonding induced stresses are higher when compared with FSI induced stresses due to mold flow, which might lead to die cracks.

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Published
2024-12-17
DOI
https://doi.org/10.1109/edaps64431.2024.10988468
Primary Topic
VLSI and Analog Circuit Testing
Type
article
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Root cause analysis to predict the die cracks in the multichip package

Wen How Sim, Anil Raj Purra, Harsh Kumar, Venkata Rama Satya Pradeep Vempaty et al.
3 links
VLSI and Analog Circuit Testing
article

Root cause analysis to predict the die cracks in the multichip package

Wen How Sim, Anil Raj Purra, Harsh Kumar, Venkata Rama Satya Pradeep Vempaty, Ken Tamala
article en

Abstract

The development of densely packed multi-chip packages involves numerous processes, making them susceptible to mechanical and electrical failures, specifically with overhanging dies. The encapsulated package with visible surface defects is taken for the study to understand the root cause of the defects. Decapsulation of packages have visible die cracks and simulations are performed to understand the effect of the package development processes. One of probable failure mode of fluid structure interaction (FSI) during encapsulation is simulated and understood the effect of mold flow on the overhang. Another process of wire bonding is simulated to understand the effect of wire bonding process induces stresses on overhang die. It is observed that wire bonding induced stresses are higher when compared with FSI induced stresses due to mold flow, which might lead to die cracks.

Micron (Singapore) (SG)
Openalex Percentile: Top 67%
VLSI and Analog Circuit Testing
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Root cause analysis to predict the die cracks in the multichip package — Wen How Sim, Anil Raj Purra, et al. · (2024) | TGRS Research Map | TGRS