UCIeA Signal Integrity system analysis with Embeded bridge (EMIB) for 3DIC AI Chip

Universal Chiplet Interconnect express (UCIe) is an open, multi-protocol capable, on-package interconnect standard for connecting multiple dies on the same package. UCIe allows flexibility of mixed-foundry integration with different dies in multiple foundry nodes. Silicon bridge is a promising advanced package solution that can achieve high bandwidth with high channel density. EMIB being a silicon bridge is key solution for low parasitic high-density interconnect between chiplets. In this paper we will discuss on UCIeA Phy at 16Gbps which is implemented on 3DIC technology with Through Silicon via (TSV) process with 2nd generation 2.5D Embedded Multi-die Interconnect Bridge (EMIB) in advanced package technology as an interconnect, which mitigates insertion loss & crosstalk impacts of the channel. Also, this paper discusses the signal integrity analysis & buffer modelling methodology used for this standard protocol.