Compressed SPICE-Compliant IC Models via Machine Learning Kernel Regression
This paper introduces a fully behavioral machine learning methodology for generating compact and accurate models of IC buffers. The proposed approach leverages a vector-valued implementation of the kernel Ridge regression to construct models based on observations of device transient responses recorded during normal operation. A key focus is placed on developing an efficient compression scheme to minimize model complexity (i.e., the number of regression coefficients), resulting in a compact mathematical representation that can be efficiently integrated into any SPICE-based solver.
Authors
- Igor Simone Stievano (ORCID: https://orcid.org/0000-0001-7287-7360)
- Riccardo Trinchero (ORCID: https://orcid.org/0000-0002-1838-2591)
- Tommaso Bradde (ORCID: https://orcid.org/0000-0002-9464-2535)
- Paolo Manfredi (ORCID: https://orcid.org/0000-0002-0574-8945)
- Marco Atlante
Institutions
- Politecnico di Torino (IT)
Publication Details
- Published
- 2024-12-17
- DOI
- https://doi.org/10.1109/edaps64431.2024.10988464
- Citations
- 2
- Primary Topic
- VLSI and Analog Circuit Testing
- Type
- article
- Field-Weighted Citation Impact
- 0.98