Impact of Ground Bounce on Logic-High: A Case Study of CMOS Inverter

This paper presents novel findings on the impact of ground-bounce noise (GBN) on the Logic-HIGH levels of CMOS inverter circuits. While the power supply noise effect on Logic-HIGH is well-studied in literature, the impact of ground bounce has been primarily analyzed with a focus on Logic-LOW. This study highlights the significant influence of GBN on Logic-HIGH, supported by semi-analytical theoretical analysis. The findings are validated through measurement-based case studies, with measurements using standard HEX inverter ICs. A strong correlation between theoretical analysis and practical observations is observed.