An Improved Space Vector PWM Algorithm with a Seven-Stage Switching Sequence for Three-Level Neutral Point Clamped Voltage Source Inverters

The main purpose of this research is to develop an improved space vector pulse-width modulation (SVPWM) algorithm for three-level (3L) neutral point clamped (NPC) voltage source inverters (VSIs). The results of experiments conducted on the three-level power converter laboratory setup showed that the proposed SVPWM algorithm with a seven-stage switching sequence (SS) can reduce a VSI’s switching frequency by 43.48% compared to the SVPWM algorithm with the base SS. It also improves the neutral point (NP) voltage balance in the VSI DC link by 4.2% by controlling the duty factor of distributed base vectors in each SVPWM period based on phase load currents. It reduced the values of the 5th- and 7th-order harmonics of the VSI output voltage by 19% and 15.7%, respectively. The results show that the usage of the improved SVPWM algorithm helps increase the efficiency of a 3L NPC VSI by 0.6% and reduce the higher harmonics. The obtained results confirm the efficiency of the suggested algorithm and its great potential for power converters in industry.