Design of DTMOS Based Preamplifier for Low Power and High Speed Comparator

In this work, an improved Dynamic Threshold MOS (DTMOS) based preamplifier circuit is proposed for low power and high speed comparator. By implementing this technique, the preamplifier circuit could be operated at low supply voltage of 0.6 V, which reduces the overall power consumption of comparator circuit. Additionally, DTMOS transistor enhances the gain (25%) of preamplifier, helping in reducing delay (50%) and increasing the overall speed of the comparator. In this paper, the DTMOS based preamplifier is first implemented with static latch resulting in better performance of comparator in terms of delay, power, PDP and energy as 109 psec, 31.8 μW, 3.5 fJ and 33 fJ/conv respectively. Secondly, the same preamplifier is implemented with dynamic latch, further improving the comparator’s performance (delay, power, PDP and energy as 64 psec, 20 μW, 1.3 fJ and 22 fJ/conv respectively). To validate the robustness of circuit to device mismatches, Monte Carlo simulations are also performed. The proposed DTMOS based preamplifier is more suitable for low voltage and high speed comparator applications.