Performance Analysis of Quaternary to Binary Converter Implemented Using FinFET models

Due to their improved energy economy and reduced circuit complexity, multivalue logics have shown to be beneficial in the field of digital system design. In the field of multivalue logic, quaternary logic is typically regarded as an inventive method. In this article, the design of a quaternary to binary converter is realized by means of 18 nm FinFET technology. Further, the performance of quaternary to binary converter is examined by employing different FinFET models. Based on simulation outcomes, the LVT, SVT, and HVT FinFET models display power consumption values of 30.23, 33.89, and 27.14 µW, transient delay values of 0.27, 0.20, and 0.26 ns, and power delay product values of 8.16, 6.77 and 7.05 (X10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-15</sup> J), respectively. The designed quaternary to binary converter architecture can be beneficial in data communication, memory systems, digital signal processing, quantum computing, error detection and correction and for applications that requires quaternary signals.