Transformer-Based Packet Scheduling Under Strict Delay and Buffer Constraints

This paper presents a packet scheduler for managing multiple links with varying channel capacities, where each link carries multiple data flows with finite buffers and strict delay constraints. Packet loss can result from buffer overflow or delay violations. We propose a deep reinforcement learning scheduler based on an encoder only transformer architecture, capable of handling a variable number of links without dedicated training. Using deep Q-learning, the scheduler minimizes the packet loss rate. Simulations show that our approach outper-forms a state-of-the-art fully connected scheduler, delivering better performance under diverse configurations of links, packet arrival rates, and channel capacities.