ASIC Design For High Speed Flash Analog To Digital Converter
This paper presents the design and implementation of an Application Specific Integrated Circuit ( ASIC) of a high-performance 4-bit Flash Analog-to-Digital Converter (ADC) using 180nm digital CMOS technology. Designed to meet the stringent demands of high speed and low power consumption, this ADC is tailored for modern signal processing applications requiring rapid and energy-efficient data conversion. The Flash ADC leverages a fully parallel architecture, utilizing an array of precision comparators and a resistor ladder network to achieve ultra-fast conversion of analog signals into digital format. Operating at a clock frequency of 100 MHz, the proposed design delivers exceptional performance while consuming only 59.71 μW from a 1.8V supply, making it ideal for power-sensitive applications. This compact and efficient A DC underscores the critical role of Flash ADCs in enabling real-time digital signal processing across diverse domains, including communication systems, medical imaging, and high-speed instrumentation.
Authors
- Brijesh Patel (ORCID: https://orcid.org/0000-0003-2663-4063)
- Rutu Parekh (ORCID: https://orcid.org/0000-0002-9913-2710)
Institutions
- Dhirubhai Ambani University (IN)
Publication Details
- Published
- 2025-03-06
- DOI
- https://doi.org/10.1109/iatmsi64286.2025.10985161
- Primary Topic
- Analog and Mixed-Signal Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00