An Improved Modulation Scheme to Minimize Circulating Currents for Parallel Interleaved Three-Level Inverter Fed FESS Motors

Parallel interleaved three-level inverters (PITIs) are much appreciated in flywheel energy storage systems (FESS), for their great reliability and efficiency. However, the subsequent circulating currents generated by the common-dc-link and asynchronous carriers can lead to excessive harmonic distortion and power losses. To solve this issue, a multiobjective optimization based pulse-width modulation (MOOPWM) scheme is proposed in this article. First, a multiconstraint vector preselection criterion is developed to reconcile the targets such as eliminating circulating currents, diminishing common-mode voltage (CMV) amplitude, and executing the nearest equilateral/isosceles vector synthesis. On this basis, the optimal vector set is determined. Then, a novel carrier-based implementation strategy is developed to synthesize the above optimal vectors set of MOOPWM. The implementation strategy incorporates smooth segmented compensation to the reference signal alongside a nonclamping phase carrier exchange algorithm, which conducts the modulation with lower computational cost. Compared with existing modulation schemes, a simultaneous reduction of circulating currents, CMV and switching loss can be achieved with the proposed MOOPWM. Finally, comparative simulations and experiments on a 300-kW PITI fed FESS motor are carried out to validate the effectiveness of the proposed scheme.