Modulating and Level-Shifted Carrier-Based DSV-PWM Technique With Fifth and Seventh Order Harmonic Elimination for Multilevel Split-Phase OEIM Drive

This article proposes a carrier-based multilevel dodecagonal space vector pulse width modulation (DSV-PWM) technique for a split-phase open-end induction motor (OEIM) drive comprising three-level neutral point clamped (NPC) inverters. The phase voltages of the split-phase OEIM drive cancel the fifth and seventh order harmonic components produced from the inverters connected at both ends of the split-phase OEIM using the DSV-PWM technique. This article discusses the generation of modulating signals with minimal trigonometric operations and compares them to the level-shifted triangular carrier signals to produce DSV-PWM signals for the three-level NPC inverters with dc link voltage of <inline-formula id="IE1" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><mml:math display="inline"><mml:mrow><mml:msub><mml:mrow><mml:mi mathvariant="bold-italic">V</mml:mi></mml:mrow><mml:mrow><mml:mtext mathvariant="bold">DC</mml:mtext></mml:mrow></mml:msub></mml:mrow></mml:math></inline-formula>, connected to one end of the OEIM. The generation of DSV-PWM signals for the three-level NPC inverters with dc voltage of <inline-formula id="IE2" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><mml:math display="inline"><mml:mrow><mml:mn>0.366</mml:mn><mml:msub><mml:mrow><mml:mi mathvariant="bold-italic">V</mml:mi></mml:mrow><mml:mrow><mml:mtext mathvariant="bold">DC</mml:mtext></mml:mrow></mml:msub></mml:mrow></mml:math></inline-formula>, connected to the other end of the split-phase OEIM, is achieved from the logical operation of DSV-PWM signals of opposite end three-level NPC inverters with dc link voltage of <inline-formula id="IE3" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><mml:math display="inline"><mml:mrow><mml:msub><mml:mrow><mml:mi mathvariant="bold-italic">V</mml:mi></mml:mrow><mml:mrow><mml:mtext mathvariant="bold">DC</mml:mtext></mml:mrow></mml:msub></mml:mrow></mml:math></inline-formula>. The approach of minimizing the trigonometric operations while generating the modulating signals and adopting the logical method of generating the DSVPWM signals reduces the overall processing time and is 4.64 times faster than the conventional method of producing the DSV-PWM signals through sector identification, vector timing computations, and storing the timing values. This is experimentally verified, and a detailed analysis is presented in this article.