Unveiling the Bias Mosaic: Enhancing Doherty Power Amplifiers With Bias Network Variation and Layout Optimization

This paper presents an enhanced Doherty power amplifier (DPA) design tailored for the 2024 IEEE High Efficiency Power Amplifier Student Design Competition (HEPA SDC). An innovative approach based on adjusting bias network electrical parameters is proposed, optimizing microstrip line electrical length and characteristic impedance to effectively improve the linearity, efficiency, and gain of the amplifier, as preliminarily verified by simulations. Furthermore, a simulated annealing algorithm is applied for electromagnetic co-simulation and layout refinement, enabling an optimized trade-off among power-added efficiency (PAE), third-order intermodulation distortion (IMD3) suppression, and output power at 3.5 GHz. Simulation and measurement results confirm that the proposed DPA meets the competition’s requirements, achieving acceptable overall performance and a competitive result in the competition.