Realistic behavioral model for ReRAMs capturing non-idealities

Abstract Memristors are a class of emerging electronic devices for in-memory computation systems, which promise to overcome the von Neumann bottleneck in traditional computer architectures. Simulation plays a critical role in designing circuits for memristive in-memory computation systems. Fast and reliable simulations require a behavioral model that accurately emulates device characteristics, accounting for real-world non-idealities. In this work, we present a memristor behavioral model that incorporates key non-idealities, including cycle-to-cycle and device-to-device resistance variations, threshold voltage variations, resistance drift in the absence of external stimulus and variations in switching dynamics. The model has been fitted to experimental data from two types of real devices: vacuum-processed self-directed channel memristors and inkjet-printed electrochemical metallization memristors, showing good agreement with both datasets. This model is used to simulate memristive stateful logic gates. Our study highlights the significance of considering device non-idealities in the practical design of memristive circuits.