DTGx2: Dual Target Diagnostic Test Generation

Logic diagnosis is important for deriving information about defects that are present in fabricated units when they are found to be faulty. This information can assist in yield learning and improvement. When needed, the accuracy of logic diagnosis can be improved by using diagnostic tests to complement fault detection tests. Diagnostic test generation for logic faults is the process that produces diagnostic tests. Diagnostic test generation procedures target fault pairs that are not distinguished by a fault detection test set. However, an improvement in diagnostic accuracy is not guaranteed as diagnostic tests are added to the test set, and some tests may cause the diagnostic accuracy to decrease. This article is the first to suggest a second target for diagnostic test generation based on the results of logic diagnosis for simulated faulty units. The second target attempts to predict when a diagnostic test will have a negative effect on the diagnostic accuracy, and helps exclude such a test from the test set. An attempt to generate an alternate test for the same fault pair is made in a later iteration of diagnostic test generation. The dual target diagnostic test generation procedure suggested in this article was implemented in an academic simulation environment and applied to benchmark circuits. Experimental results demonstrate the ability of the procedure to identify diagnostic tests that should be avoided. The tests typically have alternates that can be found in later iterations.