Research on the Design Method of YOLOv3 Convolutional Neural Network Virtualization Based on FPGA

This article proposes a design method for YOLOv3 convolutional neural network virtualization based on FPGA. The specific steps include: network structure and parameter tuning and shaping, neural network model disassembly and analysis, "neural network operator module" design, determining virtualization design modules, constructing operator modules and implementing acceleration, dynamic resource allocation and scheduling based on virtual modularization, etc. The advantage of this method compared to existing technologies is that it reduces the difficulty of AI application development using FPGA, allowing software engineers who are not familiar with FPGA development, simulation, and debugging to use FPGA for AI application development; Effectively improve the development efficiency of FPGA, so that top-level AI application development users do not need to pay too much attention to the hardware logic circuit implementation and details of FPGA, and can achieve AI application development in a shorter time; To enhance the flexibility of algorithm implementation, the parallelism level of hardware acceleration can be adjusted based on the CPU, FPGA resource situation, and real-time algorithm requirements; It can be extended to hardware acceleration applications of various convolutional neural network models.