Cycling Degradation in Hf_0.5Zr_0.5O₂-Based Co-Integrated Ferroelectric Inverters

The ferroelectric field-effect transistor (FeFET) is a promising candidate for the next-generation low-power memory devices because of its nonvolatile characteristics. Although the ferroelectric properties of FeFETs have been widely studied, there have been no reported reliability analyses of monolithic co-integrated FeFETs with CMOS. In this study, a Zr-doped HfO<sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><roman>2</roman></sub> (HZO)-based FeFET inverter was fabricated on an 8-in wafer via a monolithic co-integration process. We measured the operating characteristics of the FeFET inverter and analyzed its degradation mechanism relative to pulse cycles. We found that the switching voltage of the FeFET inverter varied depending on the number and amplitude of cycling pulses, which was influenced by traps at different regions of the FeFET gate-stack. Deep trapping was induced by a pulse large enough to switch the program/erase state, which shifted the switching voltage. However, the wake-up effect caused by increasing the number of pulse cycles suppressed the switching voltage shift due to trapping. Finally, based on the charge trapping analysis of the FeFET, the mechanism by which the operating characteristics of the FeFET inverter are degraded was explained.