Design and investigation of novel heterojunction stacked oxide-dual tunnelling FET assessing interface traps for improved reliability

Abstract In this work, a novel heterojunction dual gate-oxide (DGO) tunnel field effect transistor predicated on concept of bilateral tunnelling (BT-TFET) is being suggested and extensively tested for reliability. Significant improvement in some of the crucial parameters is shown by the proposed device in nanometre framework TFETs. The suggested device shows boosted switching ratio (10 12 ), lower threshold voltage ( V th ) (0.6 V) and subthreshold swing ( SS ) (18.5 mV decade −1 ), respectively, owed to bandgap engineering implemented in the suggested structure. Additionally, dual oxide is incorporated into the gate dielectric, elevating the capacitive coupling across the dielectric and gate resulting in improved device performance and dependability. Both the recommended heterojunction DGO-BT-TFET and the typical heterojunction SGO (single gate oxide) BT-TFET have been compared for reliability, considering negative/positive trapped charges in the context of static (DC), RF/analogue parameters, energy, power, distortion metrics including energy band-gap, higher-order transconductance, and output, transfer parameters, among others. According to the study, proposed TFET displays higher immunity to performance fluctuation than DGO-BT-TFET and heterojunction SGO-BT-TFET for different trap charges.

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Publication Details

Journal
Physica Scripta
Published
2025-05-08
DOI
https://doi.org/10.1088/1402-4896/add628
Citations
2
Primary Topic
Semiconductor materials and devices
Type
article
Field-Weighted Citation Impact
1.46
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article

Design and investigation of novel heterojunction stacked oxide-dual tunnelling FET assessing interface traps for improved reliability

Priyanka Kwatra, Kaushal Nigam, Vinay Anand Tikkiwal, Sajai Vir Singh
2 citations
Physica Scripta
Semiconductor materials and devices
1.46
article

Design and investigation of novel heterojunction stacked oxide-dual tunnelling FET assessing interface traps for improved reliability

Priyanka Kwatra, Kaushal Nigam, Vinay Anand Tikkiwal, Sajai Vir Singh
article en
2 citations

Abstract

Abstract In this work, a novel heterojunction dual gate-oxide (DGO) tunnel field effect transistor predicated on concept of bilateral tunnelling (BT-TFET) is being suggested and extensively tested for reliability. Significant improvement in some of the crucial parameters is shown by the proposed device in nanometre framework TFETs. The suggested device shows boosted switching ratio (10 12 ), lower threshold voltage ( V th ) (0.6 V) and subthreshold swing ( SS ) (18.5 mV decade −1 ), respectively, owed to bandgap engineering implemented in the suggested structure. Additionally, dual oxide is incorporated into the gate dielectric, elevating the capacitive coupling across the dielectric and gate resulting in improved device performance and dependability. Both the recommended heterojunction DGO-BT-TFET and the typical heterojunction SGO (single gate oxide) BT-TFET have been compared for reliability, considering negative/positive trapped charges in the context of static (DC), RF/analogue parameters, energy, power, distortion metrics including energy band-gap, higher-order transconductance, and output, transfer parameters, among others. According to the study, proposed TFET displays higher immunity to performance fluctuation than DGO-BT-TFET and heterojunction SGO-BT-TFET for different trap charges.

Physica ScriptaVol. 100(6)
Jaypee Institute of Information Technology (IN), National Institute of Technology Raipur (IN)
Openalex Percentile: Top 18%
Semiconductor materials and devices
1.46
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