Investigating the Saturation Phenomenon of the Drain-Induced Barrier Lowering Effect on AlGaN/GaN High Electron Mobility Transistors with Schottky-Gate Structures

This study investigates the saturation phenomenon of the drain-induced barrier lowering (DIBL) effect in Schottky-gate gallium nitride (GaN) high-electron-mobility transistors (HEMTs) featuring T-gate structures. The threshold voltage (VTH) and DIBL under various drain voltages (VD) are examined through electrical measurements and Silvaco simulations. Experimental results reveal that the DIBL effect saturates at high VD. Furthermore, comparison of ID–VG characteristics between devices with and without T-gate structures indicates that the DIBL saturation phenomenon exclusively occurs in T-gate structures. To investigate the underlying mechanism, Silvaco simulations are conducted to analyze the electric field distribution, energy band diagrams, and two-dimensional electron gas (2DEG) concentrations under high VD. The results demonstrate that the T-gate structure effectively suppresses the DIBL effect by dispersing the electric field, reducing the 2DEG concentration, and increasing the voltage drop across the drift region. Additionally, the influence of T-gate geometry on DIBL suppression is systematically studied by varying T-gate extension lengths and heights. This analysis provides valuable insights into optimizing T-gate design for enhanced performance of GaN HEMTs under high drain bias conditions.