Tailored one-dimensional/two-dimensional van der Waals heterostructures for unified analog and digital electronics

The platform based on mixed-dimensional van der Waals heterostructures is promising for compact, energy-efficient analog and digital electronics on a single substrate. Hurdles include an incomplete understanding of charge behavior at atomically thin junctions, and technical difficulties in fabricating scalable, defect-free interfaces. This study overcomes those barriers via a two-step growth strategy and detailed transport measurements, revealing a nanometer-scale depletion region and gate-tunable diode characteristics. Individual Te and MoS${}_{2}$ regions can function as high-performance $p\ensuremath{-}$ and $n\ensuremath{-}$type FETs, respectively, enabling complete CMOS logic operations on the same chip.

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Publication Details

Journal
Physical Review Applied
Published
2025-05-06
DOI
https://doi.org/10.1103/physrevapplied.23.054013
Citations
2
Primary Topic
2D Materials and Applications
Type
article
Field-Weighted Citation Impact
1.04
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article

Tailored one-dimensional/two-dimensional van der Waals heterostructures for unified analog and digital electronics

Soumik Das, Subhadeep Datta, Saptarshi Mandal, Tanima Kundu et al.
2 citations
Physical Review Applied
2D Materials and Applications
1.04
article

Tailored one-dimensional/two-dimensional van der Waals heterostructures for unified analog and digital electronics

Soumik Das, Subhadeep Datta, Saptarshi Mandal, Tanima Kundu, Bikash Das, Kapildeb Dolui, Rahul Paramanik, Mainak Palit, K. Dey, Sujan Maity, Bipul Karmakar
article en
2 citations

Abstract

The platform based on mixed-dimensional van der Waals heterostructures is promising for compact, energy-efficient analog and digital electronics on a single substrate. Hurdles include an incomplete understanding of charge behavior at atomically thin junctions, and technical difficulties in fabricating scalable, defect-free interfaces. This study overcomes those barriers via a two-step growth strategy and detailed transport measurements, revealing a nanometer-scale depletion region and gate-tunable diode characteristics. Individual Te and MoS${}_{2}$ regions can function as high-performance $p\ensuremath{-}$ and $n\ensuremath{-}$type FETs, respectively, enabling complete CMOS logic operations on the same chip.

Physical Review AppliedVol. 23(5)
Indian Association for the Cultivation of Science (IN), University of Cambridge (GB), CE Technologies (United Kingdom) (GB)
Openalex Percentile: Top 26%
2D Materials and Applications
1.04
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